Case Background
Problem: Verne Global wanted well-researched, long-form blog content to inform their customers how HPC computing power was changing their industries and could benefit them. 
Solution: We created a sustained stream of blog content that explored HPC and machine learning use cases in a range of fields. These blogging efforts help spur rapid growth at Verne Global .

The New Era of Microprocessor
Designed for HPC Applications

 

For many years the Intel Xeon line of processors has been the dominant chip in the HPC industry, occupying over 90% market of the data center market. But as the competition for exascale computing intensifies, so has the competition to develop a chip that can deliver the power efficiency, computational capability, and price to make that new era of HPC a feasible reality.

Over the last year, a series of announcements about new chips aimed at the HPC market have presented both vendors and end-users with a broader range of chip options than has been available in years, presenting both a challenge to Intel’s position as the undisputed market leader and a much-needed shot in the arm to that corner of the HPC industry.

The most high-profile challenge comes from AMD, who has been largely absent from the data center market after the success of their Opteron chips over ten years ago. The company’s newest product, called EPYC, refocuses the company’s effort on high-throughput chips, a shift away from the companies attempt to promote hybrid CPU-GPU chips to the hyperscale and HPC markets; a strategy that failed to capture significant market share.

Unlike those chips, the new EPYC line is all power, featuring a modular design that allows a higher-degree of scalability and a maximum of up to 32 cores. Other features that has helped EPYC win market share include an enlarged memory capacity, memory bandwidth, and four bidirectional interconnects that connect the two physical sockets, making the EPYC line well suited to both HPC and machine learning tasks. According to benchmark report at AnandTech, the flagship AMD 7601 provides a very significant savings in performance per watt over its counterpart process from Intel along with solid benchmark performance in general and technical computing tasks.

In just the one year since its release, the EPYC line has revitalized AMD’s fortunes, earning the company high-profile deals with vendors like Microsoft Azure, which has deployed an EPYC-based offering in its data center, as well as HPE, AMAX, ASUS, Silicon Mechanics, and others. This warm industry reception appears to be helping AMD’s gamble on an HPC chips pay off. According to AMD, the company shipped more than twice the number of EPYC chips in the first quarter of 2018 than it did Q4 2017, growth which may eventually help expand the overall size of AMD’s business.

Another one of the more exciting developments in the HPC chip race has been in the realm of ARM processors, a simplified but highly-customizable chip architecture. Though ARM processors are most often found in mobile devices, the ARM instruction set architecture (ISA) has a growing audience in the HPC industry as well. The recent announcement of the “Post-K Computer,” a joint project between Fujitsu and Japanese research institute RIKEN, is one of the higher-profile applications of ARM processors in a supercomputer so far.

A descendant to the “K computer,” which for a time in June 2011 was the world’s fastest supercomputer, the Post-K computer aims for near-exascale performance with the ARM Arm8A-SVE chips, instead of the heavily modified SPARC chips of the original K Computer.

Arm chips are also being used to deliver production-scale HPC clusters in the UK as well. The GW4 Isambard project, funded by the Engineering and Physical Sciences Research Council (EPSRC), is a collaboration between the GW4 Alliance — a consortium of universities from Bristol, Bath, Cardiff and Exeter — together with Cray, ARM, Cavium, and others. In this video from the Going Arm conference held at the beginning of this year, Prof. Simon McIntosh-Smith from The University of Bristol discusses why the GW4 Isambard project chose to the ARM processors, highlighting the benefit of having access to a processor ecosystem that’s driven by the fast-growing mobile chip industry. In addition to Isambard, The University of Bristol recently announced the launch of the Catalyst UK project, a separate project run in partnership with HPE and Arm that’s designed to further accelerate the adoption of Arm processors for HPC.   

That’s not the only interesting development in the HPC chip market that’s occurring in Europe. The European Processor Initiative (EPI) was launched in 2017 with the goal of forming an entirely European solution to the need for purpose-built HPC chips. Since its formation, over 27 European country have signed on to help coordinate research efforts across the EU and speed the creation of a European low-power microprocessor aimed at powering exascale HPC systems.

Though still in the early stages, the EPI initiative, part of a € 120 million Framework Partnership Agreement (FPA), has set the goal of releasing a prototype chip by 2020 and produce a chip sometime 2021. According to what little information is currently available about their progress, EPI project leaders hope to extend the capability of the chip to other applications within industry that could benefit from low-power, high-throughput processing capabilities, like the autonomous vehicle industry.

The road to developing specialized HPC chips is a daunting task, especially for insurgents that are challenging Intel’s many years of dominance in the field. That’s true even if the insurgent is former Intel President Ms. Renee James, who announced earlier this year that her company Ampere would release a 64-bit Arm chip made for the hyperscale market. Though the challenges to developing the next best HPC chip are daunting, the fact that so many organizations are still willing to take the risk of competing with Intel in this area is a testament to just how exciting and promising these technologies are.